Keynote and Invited Talks

 | Post date: 2021/12/21 | 
“Wireline MIMO Communications”
 Armin Tajalli, University of Utah, USA
10-11:30 Wednesday 22 Dec. 2021
Massive data movement is a key requirement in modern multi-core multi-processor computing machines. Due to heat, yield, and performance concerns, many high-end products are now moving toward Multi-Chip-Module (MCM) SoC architecture. In such systems, the data rate as well as energy consumption are extremely crucial. Thus, new design methodologies and communication schemes are required to implement high-throughput and energy-efficient links. Advanced Multi-Input Multi-Output signaling schemes will be introduced in this seminar that can enhance the total communication bandwidth over short- and long-reach copper channels. Novel circuit architectures in conjunction with low-ISI (Inter-Symbol-Interference) sensitivity signaling method allows to implement very energy-efficient and very high-speed links. Examples will be provided to evaluate performance of the proposed serial data transceiver.
“Brining Fun Back into the Circuit Design”
Ehsan Afshari, Michigan Ann Arbor, USA
17-18:30 Wednesday 22 Dec. 2021
There are plenty of intriguing physical phenomena around us: from wave propagation in ocean to the movement of roller-coasters. These everyday examples can be used as inspiration in analog and RF circuit design. In this talk, we will show three examples of novel circuits that can achieve a much better performance compared to the conventional circuit topologies. The examples are focused on high speed, broadband, and low noise circuits. 

“high-speed clock generation and distribution for data converters”
Mahdi Parvizi, Cisco, Canada
18:30-20 Wednesday 22 Dec. 2021
High-speed serial and optical I/Os are driven continuously to higher density and bandwidth to enable the scaling of data centers to meet the demand imposed by a digitally connected world. The DSP based wireline and optical transceivers rely on high baud-rate data converters to transmit and receive the data. These data converters rely on high frequency, low jitter clocks to sample the data. This talk covers the requirements of a high-speed clock generation and distribution for data converters used in high-speed serial and optical I/Os and the latest design techniques to generate them with low power consumption to meet the stringent requirements of data-center interconnect.

“Silicon: The playground for photons and electrons”
Sudip Shekhar University of British Columbia, Canada
9-10:30 Thursday 23 Dec. 2021
The devices in the arsenal of a CMOS designer include resistors, capacitors, inductors, and transistors. What happens when we add light to that? With an ability to move the information between electrons and photons, many new opportunities and applications will emerge. In the last five years, silicon photonics - where light is guided in a silicon waveguide on a CMOS SOI process, has already had a significant impact in the field of high-speed transceivers for data communications. 
Which applications will become mainstream in the next 5-10 years? Sensing? Computing? RF & Microwave? Quantum? What will be next in communications? 
And how can we easily add photonics to the arsenal of the CMOS designer and make its adoption seamless? I will attempt to answer some of these questions in this talk. I will also highlight the opportunities that lie ahead for a CMOS designer in adopting this technology - now ready to be deployed.

“Scalable Standing Wave Integrated Circuits for Reconfigurable Power Generation, Radiation and Beam Steering at mm-Wave and Terahertz Spectrum”
Omeed Momeni, University of California, Davis, USA
19:30-21 Thursday 23 Dec. 2021
The power generation of transistors drops as we move to higher frequencies. At the same time, the free space propagation loss increases, demanding more radiated power from the system. The loss of passive elements in the circuit increases as well, making functions such as oscillation or radiation even more challenging. In order to boost the limited power, multiple sources need to be coupled together in an array structure. However, the significant loss of the coupling circuitry and phase shifters at mm-wave and terahertz frequencies hinders the implementation of large and efficient radiator and phased arrays. Scalable standing wave array structures are proposed based on efficient low-loss coupling schemes in order to boost the power and operation bandwidth. Furthermore, we present a practical approach to maximize Equivalent Isotropic Radiated Power (EIRP) of the source by optimizing influential parameters of the radiation apparatus. Finally, we demonstrate a new phase shifting method based on combining standing and traveling waves and show how it can achieve significantly higher reconfigurability, phase shifting range and bandwidth. Using all these methods we present coupled-oscillators, scalable radiator arrays, and reconfigurable phased arrays with record beam steering range, tuning range, and output power at mm-wave and terahertz frequencies.

“Recent trends and progress in perovskite-based devices”
Vahid Ahmadi, Tarbiat Modares University, Iran
10:30-12 Friday 24 Dec. 2021
In the past decade, perovskite-based devices have attracted tremendous attention around the world. Perovskite materials, as an active layer, are used in a variety of devices, including capacitors, sensors and detectors, memories, catalysts, fuel cells, and optoelectronic devices, including solar cells and light-emitting diodes (LEDs). In this talk, first, the perovskite-based solar cells and LEDs structures and their operation principles will be introduced. Then, the challenges and obstacles in the commercialization of these devices are investigated and the solutions are presented. It also provides a vision of the future of these devices and their applications.

“The 3-D Interconnect Landscape”
Jaber Derakhshande, Imec, Belguim
16-17:30 Friday 24 Dec. 2021
3D integration technologies enable increasing complexity, reducing cost and adding new system functionalities to electronics products making sure that Moore's Law is continuing beside transistor gate length scaling. The goal of 3D integration is to improve the CMOS PPAC (power, performance, area and cost) aspects by smart partitioning, combining different technologies, different substrates and different functionalities all in one single chip. In this presentation the roadmap of advanced 3D packaging technologies will be reviewed with more details.

“Neural Electrical Stimulation Electronics”
Omid Shoaei, University of Tehran, Iran.
13-14:30 Saturday 25 Dec. 2021
Abstract: Implantable neural electrical stimulators can be used to treat a variety of neurological disorders and/or restore some body functions such as DBS (Deep Brain Stimulation) for Parkinson disease, SCS (Spinal Cord Stimulation) for chronic pain, Cochlear Implants for stimulating cochlear nerves for inner hearing loss, Epiretinal prosthesis for treating retinal degenerative diseases, etc. 
The power efficiency and safety of the electrical stimulators are uncompromisable. Also, the characteristics of the stimulator such as the voltage compliance, and current/voltage resolution are among the design challenges defining the ASIC technology node. Some charge balancer circuits and systems to ensure the electrical stimulation safe for both the tissue and the electrode are presented. Multi-channel concurrent stimulation and generating different waveforms to increase the efficacy are also discussed. Different types of neural stimulation circuitries are introduced, and as an example, an energy efficient multichannel adiabatic switching-based stimulator with high driving current capability (up to 10 mA) is presented in more details. The stored energy in the electrode-tissue capacitor in the first phase of the stimulation will be mostly recovered in the second phase. The proposed stimulator consists of a dynamic differential power supply which makes the biphasic stimulation possible without the need of H-bridge.

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